Welcome to Journal of Microelectronic Manufacturing!
Patterning Defect Study for Process Integration Engineering Using Pattern Fidelity Monitoring with Review SEM Images
Authors: Yu Zhang, Abhishek Vikram, Ming Tian et al.
Institution:Shanghai Huali Microelectronics Corp, ., Pudong District, Shanghai
Keywords:Die-to-database Pattern Monitor;After Develop Inspection (ADI);After Etch Inspection (AEI);SEM Review;CDSEM;pattern centric;pattern monitor
Issue 2: 19020203, 2019 | PDF
Research Article
Published: June 28, 2019
Abstract: Normally the optical wafer inspection tools are used for advanced process control in high volume manufacturing of semiconductor devices. The SEM Review is done for limited sample of inspection defe...
Issue 2: 19020205, 2019 | PDF
Research Article
Published: June 28, 2019
Development and Prospect of Process Models and Simulation Methods for Atomic Layer Deposition
Authors: Lei Qu, Rui Chen, Xiaoting Li et al.
Institution:North China University of Technology, China
Keywords:thin film deposition;atomic layer deposition;growth model;prediction model;simulation method
Issue 2: 19020204, 2019 | PDF
Research Article
Published: June 26, 2019
Abstract: Thin film deposition is one of the most important processes in IC manufacturing. In this paper, several typical models and numerical simulation methods for thin film deposition and atomic layer dep...
EUV Lithography: State-of-the-Art Review
Authors: Nan Fu, Yanxiang Liu, Xiaolong Ma et al.
Institution:HiSilicon Technologies Co, ., Ltd, Shanghai
Keywords:EUV lithography;EUV review;mask 3D;line edge roughness;EUV light source
Issue 2: 19020202, 2019 | PDF
Research Article
Published: June 19, 2019
Abstract: Although several years delayed than its initial plan, extreme UV lithography (EUVL) with 13.5nm wavelength has been finally implemented into high volume manufacture (HVM) of mainstream semiconducto...
Hard IP Core Nondestructive Testing Technology
Authors: Kun Yu, Hua Wang
Institution:Sino IC Technology Co, ., Ltd, ., Shanghai
Keywords:hard IP core;system on chip (SOC);testing technology;evaluation circuit;memory;automatic test equipment (ATE)
Issue 2: 19020201, 2019 | PDF
Research Article
Published: June 10, 2019
Abstract: Based on the analysis of the existing hard IP core testing technology, the hard IP core nondestructive testing technology was studied, according to the verification requirements of a large number o...
Issue 1: 19020105, 2019 | PDF
Research Article
Published: March 29, 2019
Laser-Driven Light Sources for Nanometrology Applications
Authors: Huiling Zhu, Paul Blackborow
Institution:Energetiq Technology, Inc, ., 7, Constitution Way, Woburn
Issue 1: 19020104, 2019 | PDF
Research Article
Published: March 27, 2019
Abstract: Laser-driven light sources (LDLS) have ultrahigh-brightness and broad wavelength range. They are ideal radiation sources for optical metrology tools for advanced process control in semiconductor ma...
The Variables and Invariants in the Evolution of Logic Optical Lithography Process
Authors: Qiang Wu
Institution:Shanghai IC R, &, D Center, Shanghai
Keywords:image projection photolithography;imaging contrast;exposure latitude;mask error factor;linewidth uniformity;chemically amplified photoresist;phase shifting mask;optical proximity correction;and photoacid diffusion length
Issue 1: 19020101, 2019 | PDF
Research Article
Published: Feb. 20, 2019
Abstract: Photolithography has been a major enabler for the continuous shrink of the semiconductor manufacturing design rules. Throughout the years of the development of the photolithography, many new techno...
Hotspot Detection of Semiconductor Lithography Circuits Based on Convolutional Neural Network
Authors: Xingyu Zhou, Youling Yu
Institution:Tongji University, Shanghai
Keywords:lithography;hotspot detection;CNN;deep learning
Issue 2: 18010205, 2018 | PDF
Research Article
Published: Dec. 27, 2018
Abstract: In the advanced semiconductor lithography manufacturing process, the sub-wavelength lithography gap may cause lithographic error and the difference between the wafer pattern and mask pattern which ...
The 2017 IRDS Lithography Roadmap
Authors: Mark Neisser
Institution:Kempur Microelectronics, Beijing
Keywords:lithography roadmap;IRDS;advanced patterning;EUV lithography;directed self-assembly (DSA);Ebeam direct write;Nanoimprint
Issue 2: 18010204, 2018 | PDF
Research Article
Published: Dec. 27, 2018
Abstract: Technology roadmaps have been a part of the semiconductor industry for many years. The first roadmap was Moore’s law, which started as an empirical observation that competitive forces then turned i...