Welcome to Journal of Microelectronic Manufacturing!
Volume 3, Issue 4
  • Published: Dec. 30, 2020
  • Supervised by:None
  • Hosted by:None
  • Published by:JoMM Editorial Office

Research Article top

Guest Editorial: Special Issue on CAD Technologies
Authors: Shiuh-Wuu Lee
Issue 4: 20030401, 2020 | PDF
Research Article
Published: Dec. 30, 2020
BSIM-CMG compact model for IC CAD: from FinFET to Gate-All-Around FET Technology
Authors: Avirup Dasgupta, Chenming Hu
Institution:Department of Electrical Engineering and Computer Science, University of California
Keywords:gate-all-around;GAAFET;FinFET;BSIM;BSIM-CMG;compact model;quantum;nanosheet;3D;transistor
Issue 4: 20030402, 2020 | PDF
Research Article
Published: Dec. 30, 2020
Abstract: We discuss the BSIM-CMG compact model for SPICE simulations of any common multi-gate (CMG) device. This is an industry standard model which has been used extensively for FinFETs IC design and simul...
On the History of the Numerical Methods Solving the Drift Diffusion Model
Authors: Bernd Meinerzhagen
Institution:Technical University Braunschweig
Issue 4: 20030403, 2020 | PDF
Research Article
Published: Dec. 30, 2020
Abstract: In 1964 Hermann Gummel published the first numerical solution method for the one-dimensional Drift Diffusion model. In his seminal paper [1] already the nonlinear iteration method and th...
Nano-Electronic Simulation Software (NESS): A Novel Open-Source TCAD Simulation Environment
Authors: Cristina Medina-Bailon, Tapas Dutta, Fikru Adamu-Lema et al.
Institution:Device Modelling Group, James Watt School of Engineering, University of Glasgow
Keywords:Integrated Simulation Environment;Variability;Drift-Diffusion;Quantum Correction;Kubo-Greenwood;Non-Equilibrium Green’s Function
Issue 4: 20030404, 2020 | PDF
Research Article
Published: Dec. 30, 2020
Abstract: This paper presents the latest status of the open source advanced TCAD simulator called Nano-Electronic Simulation Software (NESS) which is currently under development at the Device Modeling Group ...
First-principles Simulations of Tunneling FETs Based on van der Waals MoTe2/SnS2 Heterojunctions with Gate-to-drain Overlap Design
Authors: Kun Luo, Kui Gong, Jiangchai Chen et al.
Institution:Key Laboratory of Microelectronics Device and Integrated Technology, Institute of Microelectronics of Chinese Academy of Sciences
Keywords:2D materials heterojunction;tunnel-FET;gate-to-drain overlap;DFT-NEGF
Issue 4: 20030405, 2020 | PDF
Research Article
Published: Dec. 30, 2020
Abstract: The electronic properties and transport properties of MoTe2/SnS2 heterostructure Tunneling FETs are investigated by the density functional theory coupled with non-equilibrium ...
Material Modeling in Semiconductor Process Applications
Authors: Boris A. Voinov, Patrick H. Keys, Stephen M. Cea et al.
Institution:Logic Technology Development, Intel Corporation, Hillsboro OR
Keywords:TCAD;atomistic modeling;density functional theory;molecular dynamics;kinetic Monte Carlo
Issue 4: 20030406, 2020 | PDF
Research Article
Published: Dec. 30, 2020
Abstract: During the past decade, significant progress has been achieved in the application of material modeling to aid technology development in semiconductor manufacturing companies such as Intel. In this ...
Fast and Accurate Machine Learning Inverse Lithography Using Physics Based Feature Maps and Specially Designed DCNN
Authors: Xuelong Shi, Yan Yan, Tao Zhou et al.
Institution:Shanghai IC Research and Development Center, Shanghai
Keywords:Optimal feature maps;inverse lithography technology (ILT);deep convolution neural network (DCNN)
Issue 4: 20030407, 2020 | PDF
Research Article
Published: Dec. 30, 2020
Abstract: Inverse lithography technology (ILT) is intended to achieve optimal mask design to print a lithography target for a given lithography process. Full chip implementation of rigorous inverse lithograp...
Machine Learning based Optical Proximity Correction Techniques
Authors: Pengpeng Yuan, Taian Fan, Yaobin Feng et al.
Institution:Institute of Microelectronics, Chinese Academy of Science, Beijing
Keywords:optical proximity correction;machine learning;deep learning;lithography
Issue 4: 20030408, 2020 | PDF
Research Article
Published: Dec. 30, 2020
Abstract: The shrinking of the size of the advanced technological nodes brings up new challenges to the semiconductor manufacturing community. The optical proximity correction (OPC) is invented to reduce the...
Enabling Variability-Aware Design-Technology Co-Optimization for Advanced Memory Technologies
Authors: Salvatore M. Amoroso, Plamen Asenov, Jaehyun Lee et al.
Institution:Synopsys Europe, Ltd.
Keywords:DTCO;Statistical Variability;Process Variability;Semiconductor Memories;DRAM;CMOS;Scaling
Issue 4: 20030409, 2020 | PDF
Research Article
Published: Dec. 30, 2020
Abstract: This paper presents a TCAD-based methodology to enable Design-Technology Co-Optimization (DTCO) of advanced semiconductor memories. After reviewing the DTCO approach to semiconductor devices scalin...
Pattern-Centric Computational System for Logic and Memory Manufacturing and Process Technology Development
Authors: Chenmin Hu, Khurram Zafar, Abhishek Vikram et al.
Institution:Anchor Semiconductor, Santa Clara
Keywords:Die-to-Database;Full Chip Decomposition;Machine Learning;Defect Discovery;Pattern Fidelity;Pattern Risk Scoring;OPC Verification;Process Window Qualification
Issue 4: 20030410, 2020 | PDF
Research Article
Published: Dec. 30, 2020
Abstract: Chip designers employ computer-aided design, circuit simulation, and design rule check systems. Lithography engineers employ model-based OPC (Optical Proximity Correction) and model-based print-sim...